endergebnis/Legend-of-Zelda--The--A-Link-to-the-Past
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Legend-of-Zelda--The--A-Lin…/src/gen/bank00_v2.c
T
endergebnis-agent 62c92e2b45 Generate ALttP (USA) port from ROM via snesrecomp 
- Recompiled LoROM 1MB USA dump (crc32=777aac2f) with snesrecomp v2 (ef0b3ff7)
- 4 analysis roots emitted to src/gen (bank00 + dispatch/module/stubs)
- ALttP title adapter hooks left in src/game_rtl.c for integration
2026-10-30 11:38:29 +00:00

1591 lines
72 KiB
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/* Auto-generated by snesrecomp v2 emit_bank. Do NOT hand-edit.
*
* Bank $00. Each function below mutates the shared CpuState
* struct via cpu->A / cpu->X / etc. Memory access goes through the
* cpu_read{8,16} / cpu_write{8,16} helpers in cpu_state.h.
*/
#include <stdio.h>
#include <stdlib.h>
#include "cpu_state.h"
#include "cpu_trace.h"
#include "common_cpu_infra.h"
#include "funcs.h"
/* Forward declarations for in-bank entries. */
RecompReturn I_IRQ_M0X0(CpuState *cpu);
RecompReturn I_IRQ_M0X1(CpuState *cpu);
RecompReturn I_IRQ_M1X0(CpuState *cpu);
RecompReturn I_IRQ_M1X1(CpuState *cpu);
RecompReturn I_IRQ_M1X1(CpuState *cpu);
RecompReturn I_IRQ_M0X0(CpuState *cpu);
RecompReturn I_IRQ_M0X1(CpuState *cpu);
RecompReturn I_IRQ_M1X0(CpuState *cpu);
RecompReturn I_IRQ_M1X1(CpuState *cpu) {
extern const char *g_last_recomp_func;
g_last_recomp_func = "I_IRQ_M1X1";
RecompStackPush("I_IRQ_M1X1");
cpu_dbg_funcname("I_IRQ_M1X1");
cpu_trace_func_entry(cpu, 0x0082D8, "I_IRQ_M1X1");
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
if (interp_bridge_in_lle_scheduler()) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
RecompReturn _pending_skip = RECOMP_RETURN_NORMAL;
(void)_pending_skip; /* unused if no NLR site in this fn */
uint16 _entry_s = cpu->S;
uint8 _hrv = cpu->host_return_valid;
if (cpu_take_tailcall_return_context(&_entry_s, &_hrv)) {
cpu->host_return_valid = _hrv;
}
uint32 _host_return_pc24 = 0xFFFFFFFFu;
if (_hrv == 2 || _hrv == 3) {
uint16 _host_rpcl = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 1u));
uint16 _host_rpch = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 2u));
uint8 _host_rpb = (_hrv == 3) ? cpu_read8(cpu, 0x00, (uint16)(_entry_s + 3u)) : cpu->PB;
_host_return_pc24 = ((uint32)_host_rpb << 16) |
(uint16)((((_host_rpch << 8) | _host_rpcl) + 1u) & 0xFFFFu);
}
(void)_entry_s; /* used by trampoline balance check */
(void)_hrv;
(void)_host_return_pc24;
if (g_recomp_stack_top >= 1) g_cpu_entry_s[g_recomp_stack_top - 1] = _entry_s;
L_82D8_M1X1:
cpu_trace_block(cpu, 0x0082D8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 40;
cpu->master_cycles += 40 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
cpu->_flag_I = 1;
cpu->P = (uint8)(cpu->P | 0x04);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->A);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHA, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->X);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHX, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->Y);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHY, _old_s, -2); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->D);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHD, _old_s, -2);
}
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->DB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHB, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHB, cpu->DB, cpu->DB);
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->PB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHK, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHK, cpu->PB, cpu->PB);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x0082e1u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P | 0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 1 /*SEP*/, _old_p, cpu->P);
}
uint8 _v1 = cpu_read8(cpu, cpu->DB, (uint16)(0x012a));
cpu_write_a_m(cpu, (uint16)(_v1));
cpu->_flag_Z = (((_v1 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v1 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_831F_M1X1; }
goto L_82E9_M1X1; /* fall-through */
L_82E9_M1X1:
cpu_trace_block(cpu, 0x0082E9);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82e9u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v2 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v2));
cpu->_flag_Z = (((_v2 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v2 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82EE_M1X1; /* fall-through */
L_82EE_M1X1:
cpu_trace_block(cpu, 0x0082EE);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82eeu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v3 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v3));
cpu->_flag_Z = (((_v3 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v3 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 1) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82F3_M1X1; /* fall-through */
L_82F3_M1X1:
cpu_trace_block(cpu, 0x0082F3);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f3u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v4 = cpu_read8(cpu, cpu->DB, (uint16)(0x4212));
{
uint8 _bt = (uint8)((cpu->A & 0xFF) & (_v4 & 0xFF));
cpu->_flag_Z = (_bt == 0) ? 1 : 0;
cpu->_flag_N = (((_v4 & 0xFF) & 0x80) != 0) ? 1 : 0;
cpu->_flag_V = (((_v4 & 0xFF) & 0x40) != 0) ? 1 : 0;
}
if (cpu->_flag_V == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_82F3_M1X1; }
goto L_82F8_M1X1; /* fall-through */
L_82F8_M1X1:
cpu_trace_block(cpu, 0x0082F8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 30;
cpu->master_cycles += 30 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v5 = cpu_read8(cpu, cpu->DB, (uint16)(0x0630));
cpu_write_a_m(cpu, (uint16)(_v5));
cpu->_flag_Z = (((_v5 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v5 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v6 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v6);
uint8 _v7 = cpu_read8(cpu, cpu->DB, (uint16)(0x0631));
cpu_write_a_m(cpu, (uint16)(_v7));
cpu->_flag_Z = (((_v7 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v7 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v8 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v8);
uint8 _v9 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v9);
uint8 _v10 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v10);
uint8 _v11 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v11));
cpu->_flag_Z = (((_v11 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v11 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_830F_M1X1; /* fall-through */
L_830F_M1X1:
cpu_trace_block(cpu, 0x00830F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x830fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 10;
cpu->master_cycles += 10 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v12 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x0128), _v12);
uint8 _v13 = 0x81;
cpu_write_a_m(cpu, (uint16)(_v13));
cpu->_flag_Z = (((_v13 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v13 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v14 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x4200), _v14);
goto L_8317_M1X1; /* implicit fall-through */
L_8317_M1X1:
cpu_trace_block(cpu, 0x008317);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x8317u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 34;
cpu->master_cycles += 34 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x008319u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
L_831F_M1X1:
cpu_trace_block(cpu, 0x00831F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x831fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 54;
cpu->master_cycles += 54 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v15 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v15));
cpu->_flag_Z = (((_v15 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v15 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
cpu->A = (uint16)(cpu->S);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->x_flag) {
uint8 _v = (uint8)(cpu->A & 0xFF);
cpu->X = (uint16)((_v) & 0xFF); /* x=1 zeros high byte (hw contract) */
cpu->_flag_Z = ((_v) == 0) ? 1 : 0;
cpu->_flag_N = (((_v) & 0x80) != 0) ? 1 : 0;
} else {
cpu->X = (uint16)(cpu->A);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
}
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v16 = cpu_read16(cpu, cpu->DB, (uint16)(0x1f0a));
cpu_write_a_m(cpu, (uint16)(_v16));
cpu->_flag_Z = (((_v16 & 0xFFFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v16 & 0xFFFF)) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{ uint16 _old_s = cpu->S;
cpu->S = cpu->A;
/* trace_event uses extra0/extra1 for old/new S high bytes */
cpu_trace_event(cpu, 0, CPU_TR_DB_WRITE,
(uint8)(_old_s >> 8), cpu->S); }
uint16 _v17 = cpu_read_x16(cpu);
cpu_write16(cpu, cpu->DB, (uint16)(0x1f0a), _v17);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x00832du, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
RecompStackPop();
return RECOMP_RETURN_NORMAL;
}
RecompReturn I_IRQ_M0X0(CpuState *cpu) {
extern const char *g_last_recomp_func;
g_last_recomp_func = "I_IRQ_M0X0";
RecompStackPush("I_IRQ_M0X0");
cpu_dbg_funcname("I_IRQ_M0X0");
cpu_trace_func_entry(cpu, 0x0082D8, "I_IRQ_M0X0");
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
if (interp_bridge_in_lle_scheduler()) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
RecompReturn _pending_skip = RECOMP_RETURN_NORMAL;
(void)_pending_skip; /* unused if no NLR site in this fn */
uint16 _entry_s = cpu->S;
uint8 _hrv = cpu->host_return_valid;
if (cpu_take_tailcall_return_context(&_entry_s, &_hrv)) {
cpu->host_return_valid = _hrv;
}
uint32 _host_return_pc24 = 0xFFFFFFFFu;
if (_hrv == 2 || _hrv == 3) {
uint16 _host_rpcl = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 1u));
uint16 _host_rpch = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 2u));
uint8 _host_rpb = (_hrv == 3) ? cpu_read8(cpu, 0x00, (uint16)(_entry_s + 3u)) : cpu->PB;
_host_return_pc24 = ((uint32)_host_rpb << 16) |
(uint16)((((_host_rpch << 8) | _host_rpcl) + 1u) & 0xFFFFu);
}
(void)_entry_s; /* used by trampoline balance check */
(void)_hrv;
(void)_host_return_pc24;
if (g_recomp_stack_top >= 1) g_cpu_entry_s[g_recomp_stack_top - 1] = _entry_s;
L_82D8_M0X0:
cpu_trace_block(cpu, 0x0082D8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 40;
cpu->master_cycles += 40 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
cpu->_flag_I = 1;
cpu->P = (uint8)(cpu->P | 0x04);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->A);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHA, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->X);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHX, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->Y);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHY, _old_s, -2); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->D);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHD, _old_s, -2);
}
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->DB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHB, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHB, cpu->DB, cpu->DB);
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->PB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHK, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHK, cpu->PB, cpu->PB);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x0082e1u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P | 0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 1 /*SEP*/, _old_p, cpu->P);
}
uint8 _v1 = cpu_read8(cpu, cpu->DB, (uint16)(0x012a));
cpu_write_a_m(cpu, (uint16)(_v1));
cpu->_flag_Z = (((_v1 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v1 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_831F_M1X1; }
goto L_82E9_M1X1; /* fall-through */
L_82E9_M1X1:
cpu_trace_block(cpu, 0x0082E9);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82e9u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v2 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v2));
cpu->_flag_Z = (((_v2 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v2 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82EE_M1X1; /* fall-through */
L_82EE_M1X1:
cpu_trace_block(cpu, 0x0082EE);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82eeu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v3 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v3));
cpu->_flag_Z = (((_v3 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v3 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 1) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82F3_M1X1; /* fall-through */
L_82F3_M1X1:
cpu_trace_block(cpu, 0x0082F3);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f3u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v4 = cpu_read8(cpu, cpu->DB, (uint16)(0x4212));
{
uint8 _bt = (uint8)((cpu->A & 0xFF) & (_v4 & 0xFF));
cpu->_flag_Z = (_bt == 0) ? 1 : 0;
cpu->_flag_N = (((_v4 & 0xFF) & 0x80) != 0) ? 1 : 0;
cpu->_flag_V = (((_v4 & 0xFF) & 0x40) != 0) ? 1 : 0;
}
if (cpu->_flag_V == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_82F3_M1X1; }
goto L_82F8_M1X1; /* fall-through */
L_82F8_M1X1:
cpu_trace_block(cpu, 0x0082F8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 30;
cpu->master_cycles += 30 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v5 = cpu_read8(cpu, cpu->DB, (uint16)(0x0630));
cpu_write_a_m(cpu, (uint16)(_v5));
cpu->_flag_Z = (((_v5 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v5 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v6 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v6);
uint8 _v7 = cpu_read8(cpu, cpu->DB, (uint16)(0x0631));
cpu_write_a_m(cpu, (uint16)(_v7));
cpu->_flag_Z = (((_v7 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v7 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v8 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v8);
uint8 _v9 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v9);
uint8 _v10 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v10);
uint8 _v11 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v11));
cpu->_flag_Z = (((_v11 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v11 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_830F_M1X1; /* fall-through */
L_830F_M1X1:
cpu_trace_block(cpu, 0x00830F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x830fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 10;
cpu->master_cycles += 10 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v12 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x0128), _v12);
uint8 _v13 = 0x81;
cpu_write_a_m(cpu, (uint16)(_v13));
cpu->_flag_Z = (((_v13 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v13 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v14 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x4200), _v14);
goto L_8317_M1X1; /* implicit fall-through */
L_8317_M1X1:
cpu_trace_block(cpu, 0x008317);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x8317u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 34;
cpu->master_cycles += 34 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x008319u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
L_831F_M1X1:
cpu_trace_block(cpu, 0x00831F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x831fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 54;
cpu->master_cycles += 54 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v15 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v15));
cpu->_flag_Z = (((_v15 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v15 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
cpu->A = (uint16)(cpu->S);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->x_flag) {
uint8 _v = (uint8)(cpu->A & 0xFF);
cpu->X = (uint16)((_v) & 0xFF); /* x=1 zeros high byte (hw contract) */
cpu->_flag_Z = ((_v) == 0) ? 1 : 0;
cpu->_flag_N = (((_v) & 0x80) != 0) ? 1 : 0;
} else {
cpu->X = (uint16)(cpu->A);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
}
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v16 = cpu_read16(cpu, cpu->DB, (uint16)(0x1f0a));
cpu_write_a_m(cpu, (uint16)(_v16));
cpu->_flag_Z = (((_v16 & 0xFFFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v16 & 0xFFFF)) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{ uint16 _old_s = cpu->S;
cpu->S = cpu->A;
/* trace_event uses extra0/extra1 for old/new S high bytes */
cpu_trace_event(cpu, 0, CPU_TR_DB_WRITE,
(uint8)(_old_s >> 8), cpu->S); }
uint16 _v17 = cpu_read_x16(cpu);
cpu_write16(cpu, cpu->DB, (uint16)(0x1f0a), _v17);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x00832du, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
RecompStackPop();
return RECOMP_RETURN_NORMAL;
}
RecompReturn I_IRQ_M0X1(CpuState *cpu) {
extern const char *g_last_recomp_func;
g_last_recomp_func = "I_IRQ_M0X1";
RecompStackPush("I_IRQ_M0X1");
cpu_dbg_funcname("I_IRQ_M0X1");
cpu_trace_func_entry(cpu, 0x0082D8, "I_IRQ_M0X1");
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
if (interp_bridge_in_lle_scheduler()) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
RecompReturn _pending_skip = RECOMP_RETURN_NORMAL;
(void)_pending_skip; /* unused if no NLR site in this fn */
uint16 _entry_s = cpu->S;
uint8 _hrv = cpu->host_return_valid;
if (cpu_take_tailcall_return_context(&_entry_s, &_hrv)) {
cpu->host_return_valid = _hrv;
}
uint32 _host_return_pc24 = 0xFFFFFFFFu;
if (_hrv == 2 || _hrv == 3) {
uint16 _host_rpcl = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 1u));
uint16 _host_rpch = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 2u));
uint8 _host_rpb = (_hrv == 3) ? cpu_read8(cpu, 0x00, (uint16)(_entry_s + 3u)) : cpu->PB;
_host_return_pc24 = ((uint32)_host_rpb << 16) |
(uint16)((((_host_rpch << 8) | _host_rpcl) + 1u) & 0xFFFFu);
}
(void)_entry_s; /* used by trampoline balance check */
(void)_hrv;
(void)_host_return_pc24;
if (g_recomp_stack_top >= 1) g_cpu_entry_s[g_recomp_stack_top - 1] = _entry_s;
L_82D8_M0X1:
cpu_trace_block(cpu, 0x0082D8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 40;
cpu->master_cycles += 40 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
cpu->_flag_I = 1;
cpu->P = (uint8)(cpu->P | 0x04);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->A);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHA, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->X);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHX, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->Y);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHY, _old_s, -2); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->D);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHD, _old_s, -2);
}
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->DB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHB, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHB, cpu->DB, cpu->DB);
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->PB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHK, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHK, cpu->PB, cpu->PB);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x0082e1u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P | 0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 1 /*SEP*/, _old_p, cpu->P);
}
uint8 _v1 = cpu_read8(cpu, cpu->DB, (uint16)(0x012a));
cpu_write_a_m(cpu, (uint16)(_v1));
cpu->_flag_Z = (((_v1 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v1 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_831F_M1X1; }
goto L_82E9_M1X1; /* fall-through */
L_82E9_M1X1:
cpu_trace_block(cpu, 0x0082E9);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82e9u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v2 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v2));
cpu->_flag_Z = (((_v2 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v2 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82EE_M1X1; /* fall-through */
L_82EE_M1X1:
cpu_trace_block(cpu, 0x0082EE);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82eeu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v3 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v3));
cpu->_flag_Z = (((_v3 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v3 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 1) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82F3_M1X1; /* fall-through */
L_82F3_M1X1:
cpu_trace_block(cpu, 0x0082F3);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f3u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v4 = cpu_read8(cpu, cpu->DB, (uint16)(0x4212));
{
uint8 _bt = (uint8)((cpu->A & 0xFF) & (_v4 & 0xFF));
cpu->_flag_Z = (_bt == 0) ? 1 : 0;
cpu->_flag_N = (((_v4 & 0xFF) & 0x80) != 0) ? 1 : 0;
cpu->_flag_V = (((_v4 & 0xFF) & 0x40) != 0) ? 1 : 0;
}
if (cpu->_flag_V == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_82F3_M1X1; }
goto L_82F8_M1X1; /* fall-through */
L_82F8_M1X1:
cpu_trace_block(cpu, 0x0082F8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 30;
cpu->master_cycles += 30 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v5 = cpu_read8(cpu, cpu->DB, (uint16)(0x0630));
cpu_write_a_m(cpu, (uint16)(_v5));
cpu->_flag_Z = (((_v5 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v5 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v6 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v6);
uint8 _v7 = cpu_read8(cpu, cpu->DB, (uint16)(0x0631));
cpu_write_a_m(cpu, (uint16)(_v7));
cpu->_flag_Z = (((_v7 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v7 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v8 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v8);
uint8 _v9 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v9);
uint8 _v10 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v10);
uint8 _v11 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v11));
cpu->_flag_Z = (((_v11 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v11 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_830F_M1X1; /* fall-through */
L_830F_M1X1:
cpu_trace_block(cpu, 0x00830F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x830fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 10;
cpu->master_cycles += 10 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v12 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x0128), _v12);
uint8 _v13 = 0x81;
cpu_write_a_m(cpu, (uint16)(_v13));
cpu->_flag_Z = (((_v13 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v13 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v14 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x4200), _v14);
goto L_8317_M1X1; /* implicit fall-through */
L_8317_M1X1:
cpu_trace_block(cpu, 0x008317);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x8317u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 34;
cpu->master_cycles += 34 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x008319u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
L_831F_M1X1:
cpu_trace_block(cpu, 0x00831F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x831fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 54;
cpu->master_cycles += 54 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v15 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v15));
cpu->_flag_Z = (((_v15 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v15 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
cpu->A = (uint16)(cpu->S);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->x_flag) {
uint8 _v = (uint8)(cpu->A & 0xFF);
cpu->X = (uint16)((_v) & 0xFF); /* x=1 zeros high byte (hw contract) */
cpu->_flag_Z = ((_v) == 0) ? 1 : 0;
cpu->_flag_N = (((_v) & 0x80) != 0) ? 1 : 0;
} else {
cpu->X = (uint16)(cpu->A);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
}
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v16 = cpu_read16(cpu, cpu->DB, (uint16)(0x1f0a));
cpu_write_a_m(cpu, (uint16)(_v16));
cpu->_flag_Z = (((_v16 & 0xFFFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v16 & 0xFFFF)) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{ uint16 _old_s = cpu->S;
cpu->S = cpu->A;
/* trace_event uses extra0/extra1 for old/new S high bytes */
cpu_trace_event(cpu, 0, CPU_TR_DB_WRITE,
(uint8)(_old_s >> 8), cpu->S); }
uint16 _v17 = cpu_read_x16(cpu);
cpu_write16(cpu, cpu->DB, (uint16)(0x1f0a), _v17);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x00832du, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
RecompStackPop();
return RECOMP_RETURN_NORMAL;
}
RecompReturn I_IRQ_M1X0(CpuState *cpu) {
extern const char *g_last_recomp_func;
g_last_recomp_func = "I_IRQ_M1X0";
RecompStackPush("I_IRQ_M1X0");
cpu_dbg_funcname("I_IRQ_M1X0");
cpu_trace_func_entry(cpu, 0x0082D8, "I_IRQ_M1X0");
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
if (interp_bridge_in_lle_scheduler()) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
RecompReturn _pending_skip = RECOMP_RETURN_NORMAL;
(void)_pending_skip; /* unused if no NLR site in this fn */
uint16 _entry_s = cpu->S;
uint8 _hrv = cpu->host_return_valid;
if (cpu_take_tailcall_return_context(&_entry_s, &_hrv)) {
cpu->host_return_valid = _hrv;
}
uint32 _host_return_pc24 = 0xFFFFFFFFu;
if (_hrv == 2 || _hrv == 3) {
uint16 _host_rpcl = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 1u));
uint16 _host_rpch = cpu_read8(cpu, 0x00, (uint16)(_entry_s + 2u));
uint8 _host_rpb = (_hrv == 3) ? cpu_read8(cpu, 0x00, (uint16)(_entry_s + 3u)) : cpu->PB;
_host_return_pc24 = ((uint32)_host_rpb << 16) |
(uint16)((((_host_rpch << 8) | _host_rpcl) + 1u) & 0xFFFFu);
}
(void)_entry_s; /* used by trampoline balance check */
(void)_hrv;
(void)_host_return_pc24;
if (g_recomp_stack_top >= 1) g_cpu_entry_s[g_recomp_stack_top - 1] = _entry_s;
L_82D8_M1X0:
cpu_trace_block(cpu, 0x0082D8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82d8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 40;
cpu->master_cycles += 40 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
cpu->_flag_I = 1;
cpu->P = (uint8)(cpu->P | 0x04);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->A);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHA, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->X);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHX, _old_s, -2); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->Y);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHY, _old_s, -2); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S - 1);
cpu_write16(cpu, 0x00, cpu->S, cpu->D);
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHD, _old_s, -2);
}
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->DB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHB, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHB, cpu->DB, cpu->DB);
{
uint16 _old_s = cpu->S;
cpu_write8(cpu, 0x00, cpu->S, (uint8)(cpu->PB));
cpu->S = (uint16)(cpu->S - 1);
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PHK, _old_s, -1);
}
cpu_trace_event(cpu, 0, CPU_TR_PHK, cpu->PB, cpu->PB);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x0082e1u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P | 0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 1 /*SEP*/, _old_p, cpu->P);
}
uint8 _v1 = cpu_read8(cpu, cpu->DB, (uint16)(0x012a));
cpu_write_a_m(cpu, (uint16)(_v1));
cpu->_flag_Z = (((_v1 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v1 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_831F_M1X1; }
goto L_82E9_M1X1; /* fall-through */
L_82E9_M1X1:
cpu_trace_block(cpu, 0x0082E9);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82e9u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v2 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v2));
cpu->_flag_Z = (((_v2 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v2 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82EE_M1X1; /* fall-through */
L_82EE_M1X1:
cpu_trace_block(cpu, 0x0082EE);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82eeu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v3 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v3));
cpu->_flag_Z = (((_v3 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v3 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_Z == 1) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_82F3_M1X1; /* fall-through */
L_82F3_M1X1:
cpu_trace_block(cpu, 0x0082F3);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f3u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 6;
cpu->master_cycles += 6 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v4 = cpu_read8(cpu, cpu->DB, (uint16)(0x4212));
{
uint8 _bt = (uint8)((cpu->A & 0xFF) & (_v4 & 0xFF));
cpu->_flag_Z = (_bt == 0) ? 1 : 0;
cpu->_flag_N = (((_v4 & 0xFF) & 0x80) != 0) ? 1 : 0;
cpu->_flag_V = (((_v4 & 0xFF) & 0x40) != 0) ? 1 : 0;
}
if (cpu->_flag_V == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_82F3_M1X1; }
goto L_82F8_M1X1; /* fall-through */
L_82F8_M1X1:
cpu_trace_block(cpu, 0x0082F8);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x82f8u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 30;
cpu->master_cycles += 30 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v5 = cpu_read8(cpu, cpu->DB, (uint16)(0x0630));
cpu_write_a_m(cpu, (uint16)(_v5));
cpu->_flag_Z = (((_v5 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v5 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v6 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v6);
uint8 _v7 = cpu_read8(cpu, cpu->DB, (uint16)(0x0631));
cpu_write_a_m(cpu, (uint16)(_v7));
cpu->_flag_Z = (((_v7 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v7 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v8 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x2111), _v8);
uint8 _v9 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v9);
uint8 _v10 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x2112), _v10);
uint8 _v11 = cpu_read8(cpu, cpu->DB, (uint16)(0x0128));
cpu_write_a_m(cpu, (uint16)(_v11));
cpu->_flag_Z = (((_v11 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v11 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->_flag_N == 0) { cpu->cycles += 1; cpu->master_cycles += ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8); goto L_8317_M1X1; }
goto L_830F_M1X1; /* fall-through */
L_830F_M1X1:
cpu_trace_block(cpu, 0x00830F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x830fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 10;
cpu->master_cycles += 10 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v12 = 0x0;
cpu_write8(cpu, cpu->DB, (uint16)(0x0128), _v12);
uint8 _v13 = 0x81;
cpu_write_a_m(cpu, (uint16)(_v13));
cpu->_flag_Z = (((_v13 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v13 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v14 = cpu_read_a16(cpu);
cpu_write8(cpu, cpu->DB, (uint16)(0x4200), _v14);
goto L_8317_M1X1; /* implicit fall-through */
L_8317_M1X1:
cpu_trace_block(cpu, 0x008317);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x8317u));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 34;
cpu->master_cycles += 34 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x008319u, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
L_831F_M1X1:
cpu_trace_block(cpu, 0x00831F);
WatchdogCheck();
if (interp_bridge_lle_master_deadline_reached(cpu)) {
RecompStackPopYield();
return interp_bridge_lle_yield_unwind(cpu, (((uint32)cpu->PB << 16) | 0x831fu));
}
cpu->coprocessor_master_cycles = cpu->master_cycles;
cpu->cycles += 54;
cpu->master_cycles += 54 * ((g_memsel && (cpu->PB & 0x80)) ? 6 : 8);
uint8 _v15 = cpu_read8(cpu, cpu->DB, (uint16)(0x4211));
cpu_write_a_m(cpu, (uint16)(_v15));
cpu->_flag_Z = (((_v15 & 0xFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v15 & 0xFF)) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{
uint8 _old_p = cpu->P;
cpu_mirrors_to_p(cpu);
cpu->P = (uint8)(cpu->P & ~0x30);
cpu_p_to_mirrors(cpu);
cpu_trace_px_record(cpu, 0, 0 /*REP*/, _old_p, cpu->P);
}
cpu->A = (uint16)(cpu->S);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
if (cpu->x_flag) {
uint8 _v = (uint8)(cpu->A & 0xFF);
cpu->X = (uint16)((_v) & 0xFF); /* x=1 zeros high byte (hw contract) */
cpu->_flag_Z = ((_v) == 0) ? 1 : 0;
cpu->_flag_N = (((_v) & 0x80) != 0) ? 1 : 0;
} else {
cpu->X = (uint16)(cpu->A);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
}
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
uint16 _v16 = cpu_read16(cpu, cpu->DB, (uint16)(0x1f0a));
cpu_write_a_m(cpu, (uint16)(_v16));
cpu->_flag_Z = (((_v16 & 0xFFFF)) == 0) ? 1 : 0;
cpu->_flag_N = ((((_v16 & 0xFFFF)) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
{ uint16 _old_s = cpu->S;
cpu->S = cpu->A;
/* trace_event uses extra0/extra1 for old/new S high bytes */
cpu_trace_event(cpu, 0, CPU_TR_DB_WRITE,
(uint8)(_old_s >> 8), cpu->S); }
uint16 _v17 = cpu_read_x16(cpu);
cpu_write16(cpu, cpu->DB, (uint16)(0x1f0a), _v17);
{ uint8 _old_db = cpu->DB; uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->DB = cpu_read8(cpu, 0x00, cpu->S);
cpu->_flag_Z = ((cpu->DB) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->DB) & 0x80) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLB, _old_s, +1);
cpu_trace_db_change(cpu, 0x00832du, _old_db, cpu->DB, CPU_TR_PLB); }
{
uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->D = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->D) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->D) & 0x8000) != 0) ? 1 : 0;
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0));
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLD, _old_s, 2);
}
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->Y = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->Y) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->Y) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLY, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->X = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->X) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->X) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLX, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
{ uint16 _old_s = cpu->S;
cpu->S = (uint16)(cpu->S + 1);
cpu->A = cpu_read16(cpu, 0x00, cpu->S);
cpu->S = (uint16)(cpu->S + 1);
cpu->_flag_Z = ((cpu->A) == 0) ? 1 : 0;
cpu->_flag_N = (((cpu->A) & 0x8000) != 0) ? 1 : 0;
cpu_trace_stack_op(cpu, 0, CPU_STACK_OP_PLA, _old_s, +2);
cpu->P = (uint8)((cpu->P & ~0x82) | (cpu->_flag_Z ? 0x02 : 0) | (cpu->_flag_N ? 0x80 : 0)); }
cpu_trace_event(cpu, 0, CPU_TR_RTI, 0, 0);
{ cpu->S = (uint16)(cpu->S + 1); cpu->P = cpu_read8(cpu, 0x00, cpu->S); cpu_p_to_mirrors(cpu);
cpu->S = (uint16)(cpu->S + 2); /* pull + discard PC */
if (!cpu->emulation) cpu->S = (uint16)(cpu->S + 1); /* native: pull + discard PB */
cpu_trace_px_record(cpu, 0, 3 /*RTI*/, cpu->P, cpu->P);
RecompStackPop();
return RECOMP_RETURN_NORMAL; /* RTI: popped interrupt frame */ }
RecompStackPop();
return RECOMP_RETURN_NORMAL;
}
void I_IRQ(CpuState *cpu) {
RecompReturn _r;
switch (((cpu->m_flag & 1) << 1) | (cpu->x_flag & 1)) {
case 0: _r = I_IRQ_M0X0(cpu); break;
case 1: _r = I_IRQ_M0X1(cpu); break;
case 2: _r = I_IRQ_M1X0(cpu); break;
case 3: _r = I_IRQ_M1X1(cpu); break;
default: _r = interp_tier_dispatch(cpu, 0x0082d8u); break;
}
if (_r != RECOMP_RETURN_NORMAL) {
fprintf(stderr,
"[recomp] non-local-return SKIP_%d leaked past void alias %s\n",
(int)_r, "I_IRQ");
abort();
}
}
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